Software & Tools

Co-Design & Simulation

Co-Design with Unique Modeling and Simulation Products

How much of your software development team's time is spent waiting for FPGA boards or for access to RTL simulators?

Advances in co-design and simulation have created more opportunities for first-pass success because now developers can simulate the entire system on a host PC prior to tape-out. ARC offers a variety of simulation products encompassing the entire scope from automatically generated cycle accurate simulators to fast, functional instruction set simulators.

Content On This Page
| Benefits | Selector Chart | xISS Turbo Fast ISS |
| xCAM Cycle Accurate Model Generation | VTOC for SoC C Models |

Benefits

Reduce Time to Market and Minimize Risk

• Parallelize hardware and software development
• Quickly iterate through multiple system configurations to determine the best options for your requirements
• Increase the number of develop/debug/optimize cycles to ensure your product meets your requirements

Differentiate to Keep Competitive Edge

• Add more features or respond to late feature requests with the schedule time gained
• Prototype earlier in the development cycle to influence prospects and customers
• Make your solution easier for your customers to integrate

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Co-Design and Simulation Tools Selector Chart

Choose the Right Tool for the Job

Although simulation is a proven tool for decreasing time-to-market, it is important to match one’s needs with the strengths of the various simulation technologies available.

ARC offers a broad suite of simulation products that enable hardware / software co-design prior to silicon being available. Each product differs in its intended use model, speed, accuracy, and debug views.

	RTL	VTOC	xCAM	MetaWare ISS	xISS Turbo
Use model	Hardware development	SoC firmware development	ARC IP firmware and software development	Software development	Software development for large programs
Speed	< 5 KHz	Depends on input RTL	40 to 60 KHz	2 MHz	200+ MHz
Accuracy	100% Cycle Accurate	100% Cycle Accurate	100% Cycle Accurate	Instruction Accurate	Instruction Accurate
Generated from ARChitect
Creates C models for distribution
Software “view” for debug
Hardware “view” for debug
Interfaces with MetaWare Debugger
Imports into SystemC

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xISS Turbo Fast ISS for Application Development

xISS enables fast development, software test and debug. ARC xISS and ARC xISS Turbo are high-performance instruction-set level simulations that increase software development productivity at every stage of ARC-Based product development. ARC xISS Turbo uses advanced Just-in-Time Compiler technology to produce 200+ MIPS (millions of instructions per second) performance, while ARC xISS provides affordable yet advanced ISS capability at ~20 MIPS performance.
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xCAM Generate for Instant Cycle Accurate Model Creation

With the addition of ARC xCAM, the ARChitect IP Configurator can automatically generate cycle accurate models of any customized ARC IP, allowing code to be tuned on the exact hardware configuration being considered. Executing at between 40kHz to 60kHz, xCAM models are available within minutes of a configuration being finalized, enabling a genuinely iterative design approach. xCAM models provide detailed cycle and “programmer’s view” information for profiling and they easily import into SystemC co-development tools.
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VTOC and IP eXchange

VTOC is the pioneer in RTL to C synthesis for the purposes of architectural exploration, early software development, and functional system verification for SoCs. VTOC allows designers to simulate easily and quickly the entire SoC to determine the proper design. Furthermore, VTOC IP eXchange creates SystemC models of any IP that can be shared with third parties. VTOC is the technology underlying xCAM Generate, which creates 100% cycle accurate models from RTL within the ARChitect IP Configurator.
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